Wednesday, 20 November 2013

TOPIC: INPUT OUTPUT IN COMPUTER ORGANIZATION AND ARCHITECHTURE

Here we will explain little bit about..... ^_^

~INPUT/OUTPUT~


1.) Input/ Output Module is an I/O architecture is its interface to outside world, CPU and Memory, and also one to more peripherals.

This is an example of Generic Model of I/O. The lines categories in 3 layers that consist of Address Lines, Data Lines, and Control Lines or called as System Bus. This 3 layers of lines will transmitted into the I/O Module and pass links to peripheral devices.
Generic Model Of I/O

2.) Input/Output Problem divided into 3 parts, which is wide variety of peripherals, all slower than CPU and RAM and need I/O modules. Wide variety of peripherals is a process that delivering different amounts of data at different speeds and in different formats.

3.) External Devices: 
     -Human readable (screen, printer, keyboard)
     -Machine readable (monitoring and control)
     -Communication (Modem, Network Interface Card (NIC) )


4) Typical I/O Rates:
Graph shows the data rates of hardware component.


5.) Module Function: 
   - Control & Timing
   - CPU Communication
   - Device Communication  
   - Data Buffering
   - Error Detection 

6.) I/O Steps:
     - CPU checks I/O module device status
     - I/O module returns status
             *If ready, CPU requests data transfer
     -I/O module gets data from device
     -I/O module transfers data to CPU
     -Variations for output, DMA, etc.

7.) I/O Module Diagram:


8.) Input Output Techniques
        •Programmed
        •Interrupt driven
        •Direct Memory Access (DMA)

9.) Programmed I/O
        •CPU has direct control over I/O
             –Sensing status
             –Read/write commands
             –Transferring data
       •CPU waits for I/O module to complete operation
       •Wastes CPU time

10.) Programmed I/O -detail
        •CPU requests I/O operation
        •I/O module performs operation
        •I/O module sets status bits
        •CPU checks status bits periodically
        •I/O module does not inform CPU directly
        •I/O module does not interrupt CPU
        •CPU may wait or come back later

11.) I/O Commands
      i. CPU issues address
         –Identifies module (& device if >1 per module)

      ii.CPU issues command
         – Control : telling module what to do (e.g. spin up disk)
         –Test : check status (e.g. power? Error?)
         –Read/Write : Module transfers data via buffer from/to device

12.) Addressing I/O Devices:
      •Under programmed I/O data transfer is very like memory access (CPU viewpoint)
      •Each device given unique identifier
      •CPU commands contain identifier (address)

13.) I/O Mapping
       i. Memory mapped I/O
              –Devices and memory share an address space
              –I/O looks just like memory read/write
              –No special commands for I/O
      ii. Large selection of memory access commands available
     iii. Isolated I/O
             –Separate address spaces
             –Need I/O or memory select lines
             –Special commands for I/O
      iv. Limited set

14.) Interrupt Driven I/O
     •Overcomes CPU waiting
     •No repeated CPU checking of device
     •I/O module interrupts when ready

15.) Interrupt Driven I/O Basic
       i.) Operation
           •CPU issues read command
           •I/O module gets data from peripheral whilst CPU does other work
           •I/O module interrupts CPU
           •CPU requests data
           •I/O module transfers data

16.) CPU Viewpoint
          •Issue read command
          •Do other work
          •Check for interrupt at end of each instruction cycle
          •If interrupted:-
             –Save context (registers)
             –Process interrupt
          •Fetch data & store
          •See Operating Systems notes

17.) Identifying Interrupting- Module (1)
         •Daisy Chain or Hardware poll
                –Interrupt Acknowledge sent down a chain
                –Module responsible places vector on bus
                –CPU uses vector to identify handler routine
         •Bus Master
                –Module must claim the bus before it can raise interrupt   (e.g. PCI & SCSI)

18.) Direct Memory Access
         •Interrupt driven and programmed I/O require active CPU intervention
              –Transfer rate is limited
              –CPU is tied up
        •DMA is the answer

19.) DMA Function
       •Additional Module (hardware) on bus
       •DMA controller takes over from CPU for I/O

20.) DMA Configuration have 2 partitions:
     
     A.) DMA Configuration (1):-
  1. •Single Bus, Detached DMA controller
  2. •Each transfer uses bus twice :– (I/O to DMA then DMA to memory)
  3. •CPU is suspended twice
     B.) DMA Configuration (2):-
  1. Single Bus, Integrated DMA controller
  2. Controller may support >1 device
  3. Each transfer uses bus once :- (DMA to memory)
  4. CPU is suspended once
  5.         
DMA Module Diagram
21.) I/O Channels
       •I/O devices getting more sophisticated  :- (e.g. 3D graphics cards)
       •CPU instructs I/O controller to do transfer
       •I/O controller does entire transfer
       •Improves speed : –Takes load off CPU and Dedicated processor is faster

22.) In Interfacing Of I/O devices, you should know the:-
        •Connecting devices together
        •Bit of wire?
        •Dedicated processor/memory/buses?
        •E.g. FireWire, InfiniBand

23.) IEEE 1394 FireWire
       •High performance serial bus
       •Fast
       •Low cost
       •Easy to implement
       •Also being used in digital cameras, VCRs and TV

24.) Foreground Reading:-
       In multiprocessing systems, the process that is currently accepting input from the keyboard or other       input devices. eg
           ~ Check out Universal Serial Bus (USB)
           ~ Compare with other communication standards:- e.g Ethernet


that's all for this topic ^_^ ... ( Published by Nur Syazwani binti Md.Nor  B031310487)

(team members: Nur Syazwani binti Md.Nor, Nur Hanisah binti Daud, Muhammad Azman bin Amir)


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